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<p>This typedef contains configuration information for the device.  
 <a href="struct_x_ufs_psxc___config.html#details">More...</a></p>
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="pub-attribs"></a>
Data Fields</h2></td></tr>
<tr class="memitem:a39490cc28ba952f3bef5aa832f3c27e0"><td class="memItemLeft" align="right" valign="top">char *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_ufs_psxc___config.html#a39490cc28ba952f3bef5aa832f3c27e0">Name</a></td></tr>
<tr class="memdesc:a39490cc28ba952f3bef5aa832f3c27e0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Compatible string of the device.  <a href="#a39490cc28ba952f3bef5aa832f3c27e0">More...</a><br/></td></tr>
<tr class="separator:a39490cc28ba952f3bef5aa832f3c27e0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a4a3f9ad972b6dcab5ae62033e59571a1"><td class="memItemLeft" align="right" valign="top">UINTPTR&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_ufs_psxc___config.html#a4a3f9ad972b6dcab5ae62033e59571a1">BaseAddress</a></td></tr>
<tr class="memdesc:a4a3f9ad972b6dcab5ae62033e59571a1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Base address of the device.  <a href="#a4a3f9ad972b6dcab5ae62033e59571a1">More...</a><br/></td></tr>
<tr class="separator:a4a3f9ad972b6dcab5ae62033e59571a1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab6fd32d5fd25f5b32edf2b4f69875e67"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_ufs_psxc___config.html#ab6fd32d5fd25f5b32edf2b4f69875e67">InputClockHz</a></td></tr>
<tr class="memdesc:ab6fd32d5fd25f5b32edf2b4f69875e67"><td class="mdescLeft">&#160;</td><td class="mdescRight">Input clock frequency.  <a href="#ab6fd32d5fd25f5b32edf2b4f69875e67">More...</a><br/></td></tr>
<tr class="separator:ab6fd32d5fd25f5b32edf2b4f69875e67"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a9e08ed8c5c8ba0b3b67ce267134a9ee4"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_ufs_psxc___config.html#a9e08ed8c5c8ba0b3b67ce267134a9ee4">CfgClkFreqHz</a></td></tr>
<tr class="memdesc:a9e08ed8c5c8ba0b3b67ce267134a9ee4"><td class="mdescLeft">&#160;</td><td class="mdescRight">M-PHY Config clock frequency (external clock)  <a href="#a9e08ed8c5c8ba0b3b67ce267134a9ee4">More...</a><br/></td></tr>
<tr class="separator:a9e08ed8c5c8ba0b3b67ce267134a9ee4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac3e9e067157d1afa16f87784578dd1f9"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_ufs_psxc___config.html#ac3e9e067157d1afa16f87784578dd1f9">RefPadClk</a></td></tr>
<tr class="memdesc:ac3e9e067157d1afa16f87784578dd1f9"><td class="mdescLeft">&#160;</td><td class="mdescRight">UFS Reference Pad clock.  <a href="#ac3e9e067157d1afa16f87784578dd1f9">More...</a><br/></td></tr>
<tr class="separator:ac3e9e067157d1afa16f87784578dd1f9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a9ca68c44716762c73f53c17f35cf7eea"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_ufs_psxc___config.html#a9ca68c44716762c73f53c17f35cf7eea">IsCacheCoherent</a></td></tr>
<tr class="memdesc:a9ca68c44716762c73f53c17f35cf7eea"><td class="mdescLeft">&#160;</td><td class="mdescRight">If UFS is Cache Coherent or not.  <a href="#a9ca68c44716762c73f53c17f35cf7eea">More...</a><br/></td></tr>
<tr class="separator:a9ca68c44716762c73f53c17f35cf7eea"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:acbc5e6c3535aad9294bdcbb420c617da"><td class="memItemLeft" align="right" valign="top">u16&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_ufs_psxc___config.html#acbc5e6c3535aad9294bdcbb420c617da">IntrId</a></td></tr>
<tr class="memdesc:acbc5e6c3535aad9294bdcbb420c617da"><td class="mdescLeft">&#160;</td><td class="mdescRight">Bits[11:0] Interrupt-id Bits[15:12] trigger type and level flags.  <a href="#acbc5e6c3535aad9294bdcbb420c617da">More...</a><br/></td></tr>
<tr class="separator:acbc5e6c3535aad9294bdcbb420c617da"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a12826ecb87695efb3ea2dd824a23bfbc"><td class="memItemLeft" align="right" valign="top">UINTPTR&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_ufs_psxc___config.html#a12826ecb87695efb3ea2dd824a23bfbc">IntrParent</a></td></tr>
<tr class="memdesc:a12826ecb87695efb3ea2dd824a23bfbc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Bit[0] Interrupt parent type Bit[64/32:1] Parent base address.  <a href="#a12826ecb87695efb3ea2dd824a23bfbc">More...</a><br/></td></tr>
<tr class="separator:a12826ecb87695efb3ea2dd824a23bfbc"><td class="memSeparator" colspan="2">&#160;</td></tr>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
<div class="textblock"><p>This typedef contains configuration information for the device. </p>
</div><h2 class="groupheader">Field Documentation</h2>
<a class="anchor" id="a4a3f9ad972b6dcab5ae62033e59571a1"></a>
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<p>Base address of the device. </p>

<p>Referenced by <a class="el" href="group__ufspsxc.html#gaa67843f95526f7c11553c1f125004374">XUfsPsxc_CfgInitialize()</a>.</p>

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          <td class="memname">u32 XUfsPsxc_Config::CfgClkFreqHz</td>
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<p>M-PHY Config clock frequency (external clock) </p>

<p>Referenced by <a class="el" href="group__ufspsxc.html#gaa67843f95526f7c11553c1f125004374">XUfsPsxc_CfgInitialize()</a>.</p>

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          <td class="memname">u32 XUfsPsxc_Config::InputClockHz</td>
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<p>Input clock frequency. </p>

<p>Referenced by <a class="el" href="group__ufspsxc.html#gaa67843f95526f7c11553c1f125004374">XUfsPsxc_CfgInitialize()</a>.</p>

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          <td class="memname">u16 XUfsPsxc_Config::IntrId</td>
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<p>Bits[11:0] Interrupt-id Bits[15:12] trigger type and level flags. </p>

</div>
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<a class="anchor" id="a12826ecb87695efb3ea2dd824a23bfbc"></a>
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          <td class="memname">UINTPTR XUfsPsxc_Config::IntrParent</td>
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<p>Bit[0] Interrupt parent type Bit[64/32:1] Parent base address. </p>

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          <td class="memname">u8 XUfsPsxc_Config::IsCacheCoherent</td>
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<p>If UFS is Cache Coherent or not. </p>

<p>Referenced by <a class="el" href="group__ufspsxc.html#gaa67843f95526f7c11553c1f125004374">XUfsPsxc_CfgInitialize()</a>.</p>

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          <td class="memname">char* XUfsPsxc_Config::Name</td>
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<p>Compatible string of the device. </p>

<p>Referenced by <a class="el" href="group__ufspsxc.html#ga2002c7351a5cac41c7a0bea8c1bf8ed9">XUfsPsxc_LookupConfig()</a>.</p>

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          <td class="memname">u32 XUfsPsxc_Config::RefPadClk</td>
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<p>UFS Reference Pad clock. </p>

<p>Referenced by <a class="el" href="group__ufspsxc.html#gaa67843f95526f7c11553c1f125004374">XUfsPsxc_CfgInitialize()</a>.</p>

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